Reduce Jitter in Live Kalman Filter - Signal Processing Stack Exchange
Design a Low-Jitter Clock for High-Speed Data Converters
Choosing the ISI Filter Size for EZJIT Plus Jitter Analysis | Keysight
What are other methods for adjusting latency jitter in event-related potentials (ERPs) (P300 in particular) besides Woody filter and peak-picking? - Psychology & Neuroscience Stack Exchange
Issues with jitter, phase noise, lock time or spurs? Check the loop-filter bandwidth of your PLL - Analog - Technical articles - TI E2E support forums
Comparing and Contrasting PCIe and Ethernet Clock Jitter Specifications | Renesas
Figure 4 | Design of Jitter Compensation Algorithm for Robot Vision Based on Optical Flow and Kalman Filter
1.4GHz Low Jitter PLL with Clock Distribution Solves Difficult Clocking Problems: Multi-Clock Synchronization and Data Converter Clocking | 亚德诺半导体
Sigma-Delta ADC Clocking—More Than Jitter | Analog Devices